Software Defined Radio Implementation over System-on-Chip

The main goal of this project is to implement a radio system over a general purpose hardware using the principles of software defined radio.

The main characteristics of the final radio system are:

• Modulation: QPSK
  
• Band: free bands around 900 MHz.
  
• Channel coding: convolutional coding with a code rate of ½.
  
• Binary velocity:  low. This implementation is just a proof of concept; to create a high performance radio system is not the main goal of this project. Low binary velocity simplifies the implementation and reduces the hardware requirements.
  
• It should be able to measure the BER of a received bit stream

Additionally the final system tries to implement a protocol that allows the system to adapt its characteristics to the channel conditions.

The design process of this system is dived into four phases:

1.       Stream based digital radio: an initial simple radio is design. This system is only capable of transmitting and receiving a bit stream over a simple modulation without any type of error correction technique

2.       Packet based digital radio: The radio system is improve so it can transmit packets instead of a unstructured bit stream

3.       FEC packet based digital radio: an error correction technique is added to the system to improve the average BER.

4.       Adaptive digital radio: finally the adaptive protocol is added to the system. However due to certain implementation problem this phase has not been completed successfully.

The general purpose hardware that I use as the implementation platform for this project is a Xilinx System on chip (SoC). This SoC is formed by a digital signal processor and a FPGA. An additional board is needed to implement the radio frequency front end. All the software implementation has been done using GNU radio.