Real-Time Embedded Audio Signal System by William Jamir Silva
[Abstract]
Audio digital signal processing is the intentional modification of the digital signals. With this processing method we can store, compress, transmit and enhance any digital signal. In this project I am going to enhance an audio signal by using an Adaptive Digital Filter with the Least Mean Squares (LMS) algorithm to improve the desired sound and reducing the noise coming from the environment.
The LMS filter can be applied in situations where it is necessary to cancel a noise that is not originally from the source.
[Objectives]
My aim is to implement an adaptive digital filter simply sinusoidal signal to study and get familiarized with the concepts of Digital Signal Processing using FPGA and System-on-Chip. In addition, the comprehension of Matlab and Simulink for simulation and prototyping of the algorithms and the comprehension of development and design tools such as Xilinx ISE, Vivado and Vivado HLS.
[Hardware]
For this project I am using the ZedBoard that is a development kit that integrates the Zynq-7000 featuring dual ARM Cortex-A9, reconfigurable logic, I2S Audio Codec and SigmaDSP® Stereo that supports 48KHz record and playback. In my application the filter will be implemented in the reconfigurable logic part while the communication and control will be implemented in the ARM core.
[Application]
In this application a primary input containing the corrupted signal and a secondly input containing the reference signal will be insert into the filter, the reference signal will be filtered and subtracted from the corrupted signal. Filters used for this application can be fixed or adaptive, the fixed filters is designed with prior knowledge of the signal and the noise while adaptive filters can adjust their own parameters automatically.
My application will be a Noise Reduction using a pre-defined sinusoidal sound as noise
[Block Design]
1. Audio Codec
The Audio Codec ADAU1761 on the ZedBoard is used in this design, this codec implements the I2S serial communication for sending and receiving audio samples,
2. Programmable logic
In this block the LMS filter and the sinusoidal wave generator will be synthesized and the audio samples are transferred between the ARM processor and the programmable logic via AXI-Lite bus connection
3. Programming system (ARM processor).
In this block is created the code for the application that will control the interactions between the modules in the programmable logic which will decide the path of the audio samples that get in from the Audio Codec block.
[Design Flow]
1. Matlab
For this project a Simulink design block was created to simulate a LMS block, due to the short time available in this summer project a LMS block already implemented by Simulink with HDL code support was used.
2. HDL Coder
HDL Coder is an add-on available in Matlab that converts Matlab Code or Simulink blocks in VHDL or Verilog. I converted my LMS block implement in Simulink to VHDL code without any optimization to make a clean design.
3. Vivado
The design tool provide by Xilinx was used to make the synthesis of block filter and the IP cores related with the Audio Codecs, I/O and Bus connection with the programmable logic part.
4. Software Development Kit (SDK)
The SDK was used to program the programmable logic part controlling the audio samples coming from the Audio Codec and passing through the LMS filter. The programmable logic was also responsible do the UART communication with PC to control the mode of operation.
5. ZedBoard
ZedBoard is the development kit used in this project, after the synthesis produced by Vivado and the code by SDK both was program in to ZedBoard.
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Digital Equalizer on FPGA
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